Finite State Machine

What is the course about?

The course "Finite State Machine" is almost 9 hours course and useful to VLSI Beginners. The course covers the basics of FSM designs and Design techniques. The course is useful as a foundation course and can be best tool to design FSM controllers. The main course highlights are:

1. Video sessions with practical design concepts
2. Videos on FSM designs and Performance improvement
3. Videos on the data and control path design
4. Videos on the complex FSM designs
5. Exercises, QUIZZES and Assignments

If you wish to pursue a career in the VLSI domain then the course can be used as foundation course! In the system design, the designer should know about the various kinds of FSMs and their role. The course covers the FSM design techniques which are helpful to the VLSI beginners!

Course Structure

The course has 10 chapters and covers the basics of FSM design techniques and the role performance improvement techniques for FSM based designs!

1. Introduction to synchronous digital circuits

2. Design strategies for the complex designs

3. Introduction to FSM

4. State machine encoding

5. Moore machines and design strategies

6. Mealy machines and design strategies

7. Design of Moore sequence detectors

8. Design of Mealy sequence detectors

9. Performance improvement techniques for the FSM

10. Concluding Session : Case study of FSM controller design

What is included in this course?

By enrolling in this course, you will gain access to:

• All Course Material

• Challenging Assignments

• Exercises and Quizzes

• Flexible Time Management



Upon completion of this course, you will receive:

• A Certificate of Participation

In addition, this course offers flexible time management. With a workload of 8 to 9 hours, the suggested course length is about 3-4 weeks. If you can’t spare 2-3 hours a week or would rather finish the course faster, you can do so as well. Take as little or as much time as you need and complete the course at your own pace.

Course content

What will you learn?

You will be able to learn the basics of FSM and design techniques. The course will also cover a few advanced techniques like FSM controller designs and the data and control path design for FSM controllers

What is the target audience?

As a participant, it is recommended that you have a basic understanding of the digital design techniques.

If you are an Electronics, Electrical, Instrumentation or Computer Science engineer then you can opt for this course! Also, if you are only interested in the field of VLSI, ASIC, FPGA then you can join this course too and learn the basics of digital design FSM and design techniques!

Course instructors

Aller au profil

Vaibbhav Taraate

Vaibbhav Taraate is Entrepreneur and Mentor at “1 Rupee S T”. He holds a B.E. (Electronics) degree from Shivaji University, Kolhapur, in 1995 and secured a gold medal for standing first in all engineering branches. He has completed his M.Tech. (Aerospace Control and Guidance) in 1999 from IIT Bombay. He has over 21 years of experience in semi-custom ASIC and FPGA design, primarily using HDL languages such as Verilog, SystemVerilog and VHDL. He has worked with few multinational corporations as consultant, senior design engineer, and technical manager. His areas of expertise include RTL design using VHDL, RTL design using Verilog and SystemVerilog, complex FPGA-based design, low power design, synthesis/optimization, static timing analysis, system design using microprocessors, high-speed VLSI designs, and architecture design of complex SOCs.